A new SPA-resistant multiple scalar multiplication algorithm is proposed, which is based on the interleaving multiple scalar-multiplication algorithm. The computational and memory overheads of the new algorithm are almost negligible, but it is SPA resistant. 为此提出一种基于interleaving的抗SPA攻击的多点乘算法,新的算法在内存空间消耗和计算速度上较原算法负担增加可以忽略不计,而且能够抗SPA攻击。
The key factors on the time interleaving design are interleaving speed, circuit area and memory unit. The paper adopts one port SRAM to implement the design in order to use less memory and the optimization design methods to improve the circuit area. 时间解交织器的交织速度、电路面积、占用内存、是设计中主要因素,文中采用了单口SRAM实现,减少了对存储器的使用,利用IC设计的优化设计方法来改善电路的面积。
After have discussing the low-bit interleaving and skewed interleaving address technologies we presented address scheme of KD-VIM-1.We have implemented embedded memory system of KD-VIM-1 in VHDL. 同时对低位交叉编址技术、扭斜交叉编址技术进行了探讨,设计了适合于KD-VIM-1的嵌入式存储系统的编址方式。
Using parallel implementation structure to achieve randomization for energy and a double port RAM to finish the convolution interleaving and symbol interleaver, which decreased the designing complexity and memory space. 4. 其中加扰部分采用并行实现结构,卷积交织和符号交织均采用一块双口RAM来完成,降低了设计复杂度并减小了存储空间。